CD4015BE

Fr 1,000.00

CD4015B consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input.

Description

CD4015B consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input.

Specifications

  • Medium speed operation…12 MHz (typ.) clock rate at VDD – VSS = 10 V
  • Fully static operation
  • 8 master-slave flip-flops plus input and output buffering
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range) =

1 V at VDD = 5 V

2 V at VDD = 10 V

2.5 V at VDD = 15 V

  • Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ’B’ Series CMOS Devices”

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