74LS74 – Dual D-Type Positive-Edge-Triggered Flip-Flop

Features: Two independent positive-edge triggered D flip-flops Asynchronous Preset and Clear inputs Standard TTL logic levels (Low = 0.8V max, High = 2.0V min) Operating voltage: Typically 5V Typical propagation delay: ~20 ns Outputs: Q and Q̅ (complement)

500 RWF